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FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
16 years 3 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson
FPGA
2010
ACM
359views FPGA» more  FPGA 2010»
16 years 3 months ago
Towards scalable placement for FPGAs
Placement based on simulated annealing is in dominant use in the FPGA community due to its superior quality of result (QoR). However, given the progression of FPGA device capacity...
Huimin Bian, Andrew C. Ling, Alexander Choong, Jia...
WWW
2010
ACM
16 years 1 months ago
Inferring relevant social networks from interpersonal communication
Researchers increasingly use electronic communication data to construct and study large social networks, effectively inferring unobserved ties (e.g. i is connected to j) from obs...
Munmun De Choudhury, Winter A. Mason, Jake M. Hofm...
WWW
2010
ACM
16 years 1 months ago
Diversifying web search results
Result diversity is a topic of great importance as more facets of queries are discovered and users expect to find their desired facets in the first page of the results. However,...
Davood Rafiei, Krishna Bharat, Anand Shukla
WWW
2010
ACM
16 years 1 months ago
Context-aware citation recommendation
When you write papers, how many times do you want to make some citations at a place but you are not sure which papers to cite? Do you wish to have a recommendation system which ca...
Qi He, Jian Pei, Daniel Kifer, Prasenjit Mitra, C....
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