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» On Formal Modeling of Agent Computations
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CAV
2001
Springer
121views Hardware» more  CAV 2001»
15 years 11 months ago
A Practical Approach to Coverage in Model Checking
In formal verification, we verify that a system is correct with respect to a specification. When verification succeeds and the system is proven to be correct, there is still a q...
Hana Chockler, Orna Kupferman, Robert P. Kurshan, ...
EJWCN
2010
122views more  EJWCN 2010»
15 years 1 months ago
Using Model Checking for Analyzing Distributed Power Control Problems
Model checking (MC) is a formal verification technique which has known and still knows a resounding success in the computer science community. Realizing that the distributed power...
Thomas Brihaye, Marc Jungers, Samson Lasaulce, Nic...
ICLP
2009
Springer
16 years 7 months ago
Merging Logic Programs under Answer Set Semantics
This paper considers a semantic approach for merging logic programs under answer set semantics. Given logic programs P1, . . . , Pn, the goal is to provide characterisations of the...
James P. Delgrande, Torsten Schaub, Hans Tompits, ...
FMCO
2009
Springer
134views Formal Methods» more  FMCO 2009»
15 years 4 months ago
Verification of Context-Dependent Channel-Based Service Models
Abstract. The paradigms of service-oriented computing and modeldriven development are becoming of increasing importance in the field of software engineering. According to these par...
Natallia Kokash, Christian Krause, Erik P. de Vink
CODES
2004
IEEE
15 years 10 months ago
System-on-chip validation using UML and CWL
In this paper, a novel method for high-level specification and validation of SoC designs using UML is proposed. UML is introduced as a formal model of specification for SoC design...
Qiang Zhu, Ryosuke Oishi, Takashi Hasegawa, Tsuneo...