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» On Constructive Connectives and Systems
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ISQED
2005
IEEE
76views Hardware» more  ISQED 2005»
16 years 9 days ago
Technology Mapping for Reliability Enhancement in Logic Synthesis
Abstract— Reliability enhancements are traditionally implemented through redundancies at the system level or through the use of harden-cell-designs at the circuit level. Reliabil...
Zhaojun Wo, Israel Koren
207
Voted
ITCC
2005
IEEE
16 years 9 days ago
A RDT-Based Interconnection Network for Scalable Network-on-Chip Designs
The interconnection network plays an important role in the performance and energy consumption of a Networkon-Chip (NoC) system. In this paper, we propose a RDT(2,2,1)/α-based int...
Yang Yu, Mei Yang, Yulu Yang, Yingtao Jiang
MICRO
2005
IEEE
140views Hardware» more  MICRO 2005»
16 years 9 days ago
Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor
Data prefetching via helper threading has been extensively investigated on Simultaneous MultiThreading (SMT) or Virtual Multi-Threading (VMT) architectures. Although reportedly la...
Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Khoa Nguyen,...
NCA
2005
IEEE
16 years 9 days ago
Architectural Issues of JMS Compliant Group Communication
Group communication provides one-to-many communication primitives that simplify the development of highly available services. Despite advances in research and numerous prototypes,...
Arnas Kupsys, Richard Ekwall
187
Voted
RTSS
2005
IEEE
16 years 9 days ago
Load Balancing in Bounded-Latency Content Distribution
In this paper we present a balanced data replication scheme that provides real-time latency bounds on content retrieval in content distribution networks. Many network applications...
Chengdu Huang, Gang Zhou, Tarek F. Abdelzaher, San...
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