Sciweavers

7195 search results - page 809 / 1439
» On Computing Power
Sort
View
DAC
2000
ACM
16 years 8 months ago
The role of custom design in ASIC Chips
Custom design, in which the designer controls the physical structure of the chip, can greatly improve the speed, power, and delay of an ASIC chip without affecting design time. Th...
William J. Dally, Andrew Chang
199
Voted
DAC
2001
ACM
16 years 8 months ago
A Framework for Object Oriented Hardware Specification, Verification, and Synthesis
We describe two things. First, we present a uniform framework for object oriented specification and verification of hardware. For this purpose the object oriented language `e'...
Tommy Kuhn, Tobias Oppold, Markus Winterholer, Wol...
DAC
2001
ACM
16 years 8 months ago
Design of Half-Rate Clock and Data Recovery Circuits for Optical Communication Systems
This paper describes the design of two half-rate clock and data recovery circuits for optical receivers. Targeting the data rate of 10-Gb/s, the rst implementation incorporates a ...
Jafar Savoj, Behzad Razavi
196
Voted
ICML
2008
IEEE
16 years 8 months ago
Composite kernel learning
The Support Vector Machine (SVM) is an acknowledged powerful tool for building classifiers, but it lacks flexibility, in the sense that the kernel is chosen prior to learning. Mul...
Marie Szafranski, Yves Grandvalet, Alain Rakotomam...
ICML
2004
IEEE
16 years 8 months ago
Learning Bayesian network classifiers by maximizing conditional likelihood
Bayesian networks are a powerful probabilistic representation, and their use for classification has received considerable attention. However, they tend to perform poorly when lear...
Daniel Grossman, Pedro Domingos