While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
Multi-hop relaying will play a central role in next generation wireless systems. In this paper a novel relaying strategy that uses multiple-input multiple-output (MIMO) relays in ...
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Abstract—It has been recently shown that base station cooperation may yield great capacity improvement in downlink multiple antenna cellular networks. However, the proposed solut...