13784 search results - page 2255 / 2757 » On Computing Functions with Uncertainty |
208
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VLSID
2003
IEEE
16 years 7 months ago
2003
IEEE
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
206
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...
189
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
While some leakage power reduction techniques require modification of process technology achieving savings at the fabrication stage, others are based on circuit-level optimization...
210
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
166
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...