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ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
16 years 1 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
15 years 11 months ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
AAAI
2008
15 years 9 months ago
Metalevel Information in Ontology-Based Applications
Applications of Semantic Web technologies often require the management of metalevel information--that is, information that provides additional detail about domain-level informatio...
Thanh Tran, Peter Haase, Boris Motik, Bernardo Cue...
NOMS
2002
IEEE
122views Communications» more  NOMS 2002»
15 years 11 months ago
An embedded Web server architecture for XML-based network management
Embedded Web servers are widely used today for IP-based element management. In this paper, we present a new management architecture that combines this technology with XML, DOM, an...
Hong-Taek Ju, Mi-Jung Choi, Sehee Han, Yunjung Oh,...
SIN
2010
ACM
15 years 4 months ago
A calculus for the qualitative risk assessment of policy override authorization
Policy override is gaining traction in the research community to improve the efficiency and usability of authorization mechanisms. These mechanisms turn the conventional privilege...
Steffen Bartsch