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ISLPED
1995
ACM
100views Hardware» more  ISLPED 1995»
15 years 10 months ago
Simultaneous scheduling and binding for power minimization during microarchitecture synthesis
ABSTRACT { Sub-micron technologies and the increasing size and complexity of integrated components have aggravated the e ect of long interconnects and buses, compared to that of ga...
Aurobindo Dasgupta, Ramesh Karri
CII
2006
107views more  CII 2006»
15 years 7 months ago
A layered approach to automated electrical safety analysis in automotive environments
Software support for the automotive electrical design process is vital, as many of the safety analysis tasks needing to be carried out, while complex, are repetitive and time cons...
C. J. Price, N. A. Snooke, S. D. Lewis
INTEGRATION
2008
183views more  INTEGRATION 2008»
15 years 6 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...
EMSOFT
2004
Springer
16 years 8 days ago
An experimental analysis of the effect of the operating system on memory performance in embedded multimedia computing
As embedded systems grow in size and complexity, an operating system has become essential to simplify the design of system software, for which more accurate analysis of its impact...
Sangsoo Park, Yonghee Lee, Heonshik Shin
SIGMETRICS
2003
ACM
147views Hardware» more  SIGMETRICS 2003»
16 years 4 days ago
Effect of node size on the performance of cache-conscious B+-trees
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
Richard A. Hankins, Jignesh M. Patel