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ISCA
2006
IEEE
16 years 26 days ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
155
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ISCA
2006
IEEE
16 years 26 days ago
2006
IEEE
A simple and low-cost approach to supporting snoopy cache coherence is to logically embed a unidirectional ring in the network of a multiprocessor, and use it to transfer snoop me...
158
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ISCAS
2006
IEEE
16 years 26 days ago
2006
IEEE
In this paper a 173-bit type II ONB ECC processor Section II introduces the mathematical backgrounds for for inductive RFID applications is described. Compared with curve operation...
161
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ISCAS
2006
IEEE
16 years 26 days ago
2006
IEEE
— The X-architecture is a new integrated-circuit wiring technique in the physical design. Compared with the currently used M-architecture, which uses either horizontal or vertica...
164
Voted
ISCAS
2006
IEEE
16 years 26 days ago
2006
IEEE
As the operation frequency reaches gigahertz in very deep-submicron designs, the effect of on-chip inductance on circuit performance can no longer be neglected. Therefore, it is d...