17409 search results - page 292 / 3482 » Oblio: Design and Performance |
157
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RSP
1998
IEEE
15 years 11 months ago
1998
IEEE
A rapid design methodology for orthonormal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture utilising time-interleaved co...
232
Voted
VLSID
1993
IEEE
15 years 11 months ago
1993
IEEE
High throughput and low latency designs are required in modern high performance systems, especially for signal processing applications. Existing logic families cannot provide both...
190
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GLVLSI
2009
IEEE
15 years 10 months ago
2009
IEEE
Design debug remains one of the major bottlenecks in the VLSI design cycle today. Existing automated solutions strive to aid engineers in reducing the debug effort by identifying ...
179
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FDL
2004
IEEE
15 years 10 months ago
2004
IEEE
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
188
Voted
CHES
2003
Springer
15 years 10 months ago
2003
Springer
Abstract. Performance evaluation of the Advanced Encryption Standard candidates has led to intensive study of both hardware and software implementations. However, although plentifu...