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TASE
2008
IEEE
15 years 6 months ago
Randomized Optimal Design of Parallel Manipulators
This work intends to deal with the optimal kinematic synthesis problem of parallel manipulators under a unified framework. Observing that regular (e.g., hyper-rectangular) workspac...
Yunjiang Lou, Guanfeng Liu, Zexiang Li
205
Voted
SIGMOD
2010
ACM
208views Database» more  SIGMOD 2010»
15 years 5 months ago
An automated, yet interactive and portable DB designer
Tuning tools attempt to configure a database to achieve optimal performance for a given workload. Selecting an optimal set of physical structures is computationally hard since it ...
Ioannis Alagiannis, Debabrata Dash, Karl Schnaitte...
DATE
2004
IEEE
152views Hardware» more  DATE 2004»
15 years 10 months ago
A Design Methodology for the Exploitation of High Level Communication Synthesis
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
Francesco Bruschi, Massimo Bombana
IPPS
2010
IEEE
15 years 4 months ago
Designing high-performance and resilient message passing on InfiniBand
Abstract--Clusters featuring the InfiniBand interconnect are continuing to scale. As an example, the "Ranger" system at the Texas Advanced Computing Center (TACC) include...
Matthew J. Koop, Pavel Shamis, Ishai Rabinovitz, D...
GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
14 years 10 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...