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2006
IEEE
16 years 9 days ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
16 years 9 days ago
Droplet routing in the synthesis of digital microfluidic biochips
same level of system-level CAD support that is now commonplace in the IC industry.Recent advances in microfluidics are expected to lead to sensor systems for high-throughput bioche...
Fei Su, William L. Hwang, Krishnendu Chakrabarty
ECRTS
2006
IEEE
16 years 9 days ago
WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Isabelle Puaut
ICDM
2006
IEEE
91views Data Mining» more  ICDM 2006»
16 years 8 days ago
Entropy-based Concept Shift Detection
When monitoring sensory data (e.g., from a wearable device) the context oftentimes changes abruptly: people move from one situation (e.g., working quietly in their office) to ano...
Peter Vorburger, Abraham Bernstein
IEEEPACT
2006
IEEE
16 years 8 days ago
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...
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