Sciweavers

12194 search results - page 2242 / 2439
» Numberings Optimal for Learning
Sort
View
DSD
2009
IEEE
84views Hardware» more  DSD 2009»
16 years 1 months ago
Temperature- and Cost-Aware Design of 3D Multiprocessor Architectures
— 3D stacked architectures provide significant benefits in performance, footprint and yield. However, vertical stacking increases the thermal resistances, and exacerbates tempe...
Ayse Kivilcim Coskun, Andrew B. Kahng, Tajana Simu...
GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
16 years 1 months ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar
ICC
2009
IEEE
197views Communications» more  ICC 2009»
16 years 1 months ago
A Game-Based Self-Organizing Uplink Tree for VoIP Services in IEEE 802.16j Networks
— In this paper, we propose a game theoretical approach to tackle the problem of the distributed formation of the uplink tree structure among the relay stations (RSs) and their s...
Walid Saad, Zhu Han, Mérouane Debbah, Are H...
INFOCOM
2009
IEEE
16 years 1 months ago
Distributed Storage Management of Evolving Files in Delay Tolerant Ad Hoc Networks
— This work focuses on a class of distributed storage systems whose content may evolve over time. Each component or node of the storage system is mobile and the set of all nodes ...
Eitan Altaian, Philippe Nain, Jean-Claude Bermond
MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
16 years 1 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
« Prev « First page 2242 / 2439 Last » Next »