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FPGA
1999
ACM
142views FPGA» more  FPGA 1999»
15 years 11 months ago
Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
Abdel Ejnioui, N. Ranganathan
CBMS
1998
IEEE
15 years 11 months ago
Lexicon Assistance Reduces Manual Verification of OCR Output
An OCR system chosen for its high recognition rate and low percent of false positives also assigns low confidence values to many characters that are actually correct. Human operat...
Susan E. Hauser, A. C. Browne, George R. Thoma, Al...
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 11 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
JAVA
1999
Springer
15 years 11 months ago
Practical Guidelines for Boosting Java Server Performance
As Java technology matures, an increasing number of applications that have traditionally been the domain of languages such as C++ are implemented in Java. Many of these applicatio...
Reinhard Klemm
LCTRTS
1999
Springer
15 years 11 months ago
Effective Exploitation of a Zero Overhead Loop Buffer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanj...
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