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EUROSYS
2007
ACM
16 years 4 months ago
STMBench7: a benchmark for software transactional memory
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
Rachid Guerraoui, Michal Kapalka, Jan Vitek
EUROGRAPHICS
2010
Eurographics
16 years 4 months ago
Multi-Scale Geometry Interpolation
Interpolating vertex positions among triangle meshes with identical vertex-edge graphs is a fundamental part of many geometric modelling systems. Linear vertex interpolation is ro...
Tim Winkler, J. Drieseberg, Marc Alexa, Kai Horman...
ICCD
2004
IEEE
112views Hardware» more  ICCD 2004»
16 years 3 months ago
Reducing Issue Queue Power for Multimedia Applications using a Feedback Control Algorithm
In this work, we propose a dynamic power-aware issue queue in a general-purpose microprocessor for multimedia applications. Its resources can be adapted at runtime in accordance w...
Yu Bai, R. Iris Bahar
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
16 years 3 months ago
Simultaneous Scheduling, Binding and Layer Assignment for Synthesis of Vertically Integrated 3D Systems
Three dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a number of research efforts have addressed physical ...
Madhubanti Mukherjee, Ranga Vemuri
ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
16 years 3 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...
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