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2007
IEEE
16 years 1 months ago
Non-collective parallel I/O for global address space programming models
— Achieving high performance for out-of-core applications typically involves explicit management of the movement of data between the disk and the physical memory. We are developi...
Sriram Krishnamoorthy, Juan Piernas, Vinod Tippara...
CODES
2007
IEEE
16 years 1 months ago
Secure FPGA circuits using controlled placement and routing
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
Pengyuan Yu, Patrick Schaumont
CODES
2007
IEEE
16 years 1 months ago
Complex task activation schemes in system level performance analysis
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
Wolfgang Haid, Lothar Thiele
DATE
2007
IEEE
145views Hardware» more  DATE 2007»
16 years 1 months ago
Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
Riccardo Mariani, Gabriele Boschi, Federico Colucc...
DSN
2007
IEEE
16 years 1 months ago
A Tunable Add-On Diagnostic Protocol for Time-Triggered Systems
We present a tunable diagnostic protocol for generic time-triggered (TT) systems to detect crash and send/receive omission faults. Compared to existing diagnostic and membership p...
Marco Serafini, Neeraj Suri, Jonny Vinter, Astrit ...
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