— Achieving high performance for out-of-core applications typically involves explicit management of the movement of data between the disk and the physical memory. We are developi...
Sriram Krishnamoorthy, Juan Piernas, Vinod Tippara...
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
We present a tunable diagnostic protocol for generic time-triggered (TT) systems to detect crash and send/receive omission faults. Compared to existing diagnostic and membership p...
Marco Serafini, Neeraj Suri, Jonny Vinter, Astrit ...