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ISPASS
2006
IEEE
16 years 1 months ago
Automatic testcase synthesis and performance model validation for high performance PowerPC processors
The latest high-performance IBM PowerPC microprocessor, the POWER5 chip, poses challenges for performance model validation. The current stateof-the-art is to use simple hand-coded...
Robert H. Bell Jr., Rajiv R. Bhatia, Lizy K. John,...
SSDBM
2006
IEEE
122views Database» more  SSDBM 2006»
16 years 1 months ago
Probabilistic Ranking Queries on Gaussians
In many modern applications, there are no exact values available to describe the data objects. Instead, the feature values are considered to be uncertain. This uncertainty is mode...
Christian Böhm, Alexey Pryakhin, Matthias Sch...
ACMSE
2006
ACM
16 years 1 months ago
Static analysis of anomalies and security vulnerabilities in executable files
Software researchers have already developed static code security checkers to parse through and scan source code files, looking for security vulnerabilities [8, 9]. What about exec...
Jay-Evan J. Tevis, John A. Hamilton Jr.
CASES
2006
ACM
16 years 1 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
CODES
2005
IEEE
16 years 20 days ago
Designing real-time H.264 decoders with dataflow architectures
High performance microprocessors are designed with generalpurpose applications in mind. When it comes to embedded applications, these architectures typically perform controlintens...
Youngsoo Kim, Suleyman Sair
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