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DAC
1995
ACM
15 years 9 months ago
Performance Driven Global Routing and Wiring Rule Generation for High Speed PCBs and MCMs
A new approa ch for pe r f or ma nc e -dr ive n r outi ng i n hi ghly c onge st e d hi gh s pe e d MCMs a nd PCBs i s pr e s e nt e d. Gl oba l r out i ng i s e mpl oye d t o ma n...
Sharad Mehrotra, Paul D. Franzon, Michael Steer
GLVLSI
2000
IEEE
145views VLSI» more  GLVLSI 2000»
15 years 10 months ago
Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
Cheng-Kok Koh, Patrick H. Madden
DATE
2002
IEEE
81views Hardware» more  DATE 2002»
15 years 11 months ago
Single-Track Asynchronous Pipeline Templates Using 1-of-N Encoding
This paper presents a new fast and templatized family of fine-grain asynchronous pipeline stages based on the single-track protocol. No explicit control wires are required outside...
Marcos Ferretti, Peter A. Beerel
ASPDAC
2007
ACM
98views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Fast Analytic Placement using Minimum Cost Flow
Many current integrated circuits designs, such as those released for the ISPD2005[14] placement contest, are extremely large and can contain a great deal of white space. These new...
Ameya R. Agnihotri, Patrick H. Madden
ICCD
2008
IEEE
175views Hardware» more  ICCD 2008»
16 years 3 months ago
On-chip high performance signaling using passive compensation
— To address the performance limitation brought by the scaling issues of on-chip global wires, a new configuration for global wiring using on-chip lossy transmission lines(T-lin...
Yulei Zhang, Ling Zhang, Akira Tsuchiya, Masanori ...