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190
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EMSOFT
2009
Springer
16 years 1 months ago
Cache-aware scheduling and analysis for multicores
The major obstacle to use multicores for real-time applications is that we may not predict and provide any guarantee on real-time properties of embedded software on such platforms...
Nan Guan, Martin Stigge, Wang Yi, Ge Yu
ISPASS
2008
IEEE
16 years 1 months ago
An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory
Transactional memory (TM) is a scalable and concurrent way to build atomic sections. One aspect of TM that remains unclear is how side-effecting operations – that is, those whic...
Lee Baugh, Craig B. Zilles
198
Voted
NDSS
2008
IEEE
16 years 1 months ago
Automatic Network Protocol Analysis
Protocol reverse engineering is the process of extracting application-level specifications for network protocols. Such specifications are very helpful in a number of security-re...
Gilbert Wondracek, Paolo Milani Comparetti, Christ...
181
Voted
GLOBECOM
2007
IEEE
16 years 1 months ago
Path Diversity in Packet Switched Networks: Performance Analysis and Rate Allocation
—Path diversity works by setting up multiple parallel connections between the end points using the topological path redundancy of the network. In this paper, Forward Error Correc...
Shervan Fashandi, Shahab Oveis Gharan, Amir K. Kha...
177
Voted
CCS
2007
ACM
16 years 1 months ago
Panorama: capturing system-wide information flow for malware detection and analysis
Malicious programs spy on users’ behavior and compromise their privacy. Even software from reputable vendors, such as Google Desktop and Sony DRM media player, may perform undes...
Heng Yin, Dawn Xiaodong Song, Manuel Egele, Christ...