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RTSS
2008
IEEE
16 years 1 months ago
WCET Analysis of Multi-level Non-inclusive Set-Associative Instruction Caches
With the advent of increasingly complex hardware in realtime embedded systems (processors with performance enhancing features such as pipelines, cache hierarchy, multiple cores), ...
Damien Hardy, Isabelle Puaut
IPPS
2007
IEEE
16 years 1 months ago
Stack Trace Analysis for Large Scale Debugging
We present the Stack Trace Analysis Tool (STAT) to aid in debugging extreme-scale applications. STAT can reduce problem exploration spaces from thousands of processes to a few by ...
Dorian C. Arnold, Dong H. Ahn, Bronis R. de Supins...
QEST
2007
IEEE
16 years 1 months ago
Automated Analysis of Simulation Traces - Separating Progress from Repetitive Behavior
Among the many stages of a simulation study, debugging a simulation model is the one that is hardly reported on but that may consume a considerable amount of time and effort. In t...
Peter Kemper, Carsten Tepper
IPPS
2006
IEEE
16 years 24 days ago
Analysis of a reconfigurable network processor
In this paper an analysis of a dynamically reconfigurable processor is presented. The network processor incorporates a processor and a number of coprocessors that can be connected...
Christopher Kachris, Stamatis Vassiliadis
MOBICOM
2006
ACM
16 years 22 days ago
The design, deployment, and analysis of signetLab: a sensor network testbed and interactive management tool
Abstract-The emergence of small, inexpensive, networkcapable sensing devices led to a great deal of research on the design and implementation of sensor networks. A critical step in...
Riccardo Crepaldi, Simone Friso, Albert F. Harris ...