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ESTIMEDIA
2005
Springer
15 years 11 months ago
Custom Processor Design Using NISC: A Case-Study on DCT algorithm
Designing Application-Specific Instruction-set Processors (ASIPs) usually requires designing a custom datapath, and modifying instruction-set, instruction decoder, and compiler. A...
Bita Gorjiara, Daniel D. Gajski
DATE
2009
IEEE
104views Hardware» more  DATE 2009»
16 years 26 days ago
Programming MPSoC platforms: Road works ahead!
Abstract—This paper summarizes a special session on multicore/multi-processor system-on-chip (MPSoC) programming challenges. The current trend towards MPSoC platforms in most com...
Rainer Leupers, Andras Vajda, Marco Bekooij, Soonh...
FCCM
2006
IEEE
101views VLSI» more  FCCM 2006»
16 years 5 days ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
ESOP
1998
Springer
15 years 10 months ago
Mode-Automata: About Modes and States for Reactive Systems
Abstract. In the eld of reactive system programming, data ow synchronous languages like Lustre BCH+85,CHPP87 or Signal GBBG85 o er a syntax similar to block-diagrams, and can be e ...
Florence Maraninchi, Yann Rémond
PPOPP
2005
ACM
15 years 11 months ago
A linear-time algorithm for optimal barrier placement
We want to perform compile-time analysis of an SPMD program and place barriers in it to synchronize it correctly, minimizing the runtime cost of the synchronization. This is the b...
Alain Darte, Robert Schreiber