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VLSID
2004
IEEE
212views VLSI» more  VLSID 2004»
16 years 7 months ago
On Design and Implementation of an Embedded Automatic Speech Recognition System
We present a new design of an Embedded Speech Recognition System. It combines the aspects of both hardware and software design to implement a speaker dependent, isolated word, sma...
Sujay Phadke, Rhishikesh Limaye, Siddharth Verma, ...
160
Voted
VLSID
2004
IEEE
139views VLSI» more  VLSID 2004»
16 years 7 months ago
Open Defects Detection within 6T SRAM Cells using a No Write Recovery Test Mode
The detection of all open defects within 6T SRAM cells is always a challenge due to the significant test time requirements. This paper proposes a new design-for-test (DFT) techniq...
André Ivanov, Baosheng Wang, Josh Yang
VLSID
2003
IEEE
77views VLSI» more  VLSID 2003»
16 years 7 months ago
A Methodology for Accurate Modeling of Energy Dissipation in Array Structures
There is an increasing need for obtaining a reasonably accurate estimate of energy dissipation in SoC designs. Array structures have a significant contribution to the total system...
Mahesh Mamidipaka, Nikil D. Dutt, Kamal S. Khouri
VLSID
2003
IEEE
92views VLSI» more  VLSID 2003»
16 years 7 months ago
Energy Efficient Scheduling for Datapath Synthesis
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
Saraju P. Mohanty, N. Ranganathan
VLSID
2002
IEEE
120views VLSI» more  VLSID 2002»
16 years 7 months ago
Floorplan Evaluation with Timing-Driven Global Wireplanning, Pin Assignment and Buffer/Wire Sizing
We describe a new algorithm for floorplan evaluation using timing-driven buffered routing according to a prescribed buffer site map. Specifically, we describe a provably good mult...
Christoph Albrecht, Andrew B. Kahng, Ion I. Mandoi...