7404 search results - page 1249 / 1481 » New Tools in Education |
163
click to vote
IFL
1997
Springer
15 years 11 months ago
1997
Springer
This paper introduces a new compiler optimization called with-loop-folding. It is based on a special loop construct, the withloop, which in the functional language Sac (for Single ...
151
click to vote
DAC
1996
ACM
15 years 11 months ago
1996
ACM
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
161
click to vote
ICCAD
1993
IEEE
1993
IEEE
Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors
15 years 11 months ago
— One major problem in pipeline synthesis is the detection and resolution of pipeline hazards. In this paper we present a new solution to the problem in the domain of pipelined a...
217
click to vote
ICCAD
1994
IEEE
15 years 11 months ago
1994
IEEE
In this paper we present an enhanced design flow model that increases the capabilities of a CAD framework to support design activities on hierarchical multi-view design descriptio...
193
click to vote
MICRO
1994
IEEE
15 years 11 months ago
1994
IEEE
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...