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DATE
2007
IEEE
108views Hardware» more  DATE 2007»
16 years 1 months ago
Speeding up SystemC simulation through process splitting
This paper presents a new approach that can be used to speed up SystemC simulations by automatically optimizing the model for simulation. The work addresses the inefficiency of th...
Youssef N. Naguib, Rafik S. Guindi
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
16 years 1 months ago
Two-level microprocessor-accelerator partitioning
The integration of microprocessors and field-programmable gate array (FPGA) fabric on a single chip increases both the utility and necessity of tools that automatically move softw...
Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank V...
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
16 years 1 months ago
Layout to Logic Defect Analysis for Hierarchical Test Generation
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A...
DSN
2007
IEEE
16 years 1 months ago
Web Services Wind Tunnel: On Performance Testing Large-Scale Stateful Web Services
New versions of existing large-scale web services such as Passport.com© have to go through rigorous performance evaluations in order to ensure a high degree of availability. Perf...
Marcelo De Barros, Jing Shiau, Chen Shang, Kenton ...
HICSS
2007
IEEE
187views Biometrics» more  HICSS 2007»
16 years 1 months ago
A Service-Oriented Data Integration and Analysis Environment for In Silico Experiments and Bioinformatics Research
In this paper, we present a practical experiment of building a service-oriented system upon current web services technologies and bioinformatics middleware. The system allows scie...
Xiaorong Xiang, Gregory R. Madey, Jeanne Romero-Se...
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