- Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
Vasily G. Moshnyaga, Fumiaki Ohbayashi, Keikichi T...
The paper presents a new method for the synthesis of Petri nets from event logs in the area of Process Mining. The method derives a bounded Petri net that over-approximates the beh...
Josep Carmona, Jordi Cortadella, Michael Kishinevs...
This paper develops a new paradigm for relational learning which allows for the representation and learning of relational information using propositional means. This paradigm sugg...
The paper presents a methodology for designing the structure of a fuzzy neural network in a multi-modular connectionist system for classification purposes and illustrates the meth...
We present a new algorithm that can be used for solving the model−checking problem for linear−time temporal logic. This algorithm can be viewed as the combination of two exist...