16504 search results - page 3110 / 3301 » New Problems, New Solutions |
162
click to vote
DAC
1999
ACM
16 years 7 months ago
1999
ACM
We propose a new VLSI layout methodology which addresses the main problems faced in Deep Sub-Micron (DSM) integrated circuit design. Our layout "fabric" scheme eliminate...
157
click to vote
DAC
2000
ACM
16 years 7 months ago
2000
ACM
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...
156
click to vote
DAC
2002
ACM
16 years 7 months ago
2002
ACM
Research in algorithms for Boolean satisfiability and their efficient implementations [26, 8] has recently outpaced benchmarking efforts. Most of the classic DIMACS benchmarks fro...
163
click to vote
DAC
2003
ACM
16 years 7 months ago
2003
ACM
While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
205
click to vote
DAC
2004
ACM
16 years 7 months ago
2004
ACM
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...