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186
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ISCA
2009
IEEE
16 years 1 months ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
177
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MICRO
2008
IEEE
16 years 1 months ago
2008
IEEE
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
184
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3DIM
2007
IEEE
16 years 1 months ago
2007
IEEE
In order to construct three dimensional shape models of large scale architectures by a laser range finder, a number of range images are normally taken from various viewpoints and...
194
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ICSM
2007
IEEE
16 years 1 months ago
2007
IEEE
Bioinformaticists use the Basic Local Alignment Search Tool (BLAST) to characterize an unknown sequence by comparing it against a database of known sequences, thus detecting evolu...
219
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EMSOFT
2007
Springer
16 years 1 months ago
2007
Springer
We address the problem of mapping a set of processes which communicate synchronously on a distributed platform. The Time Triggered Architecture (TTA) proposed by Kopetz for the co...