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ERSA
2003
118views Hardware» more  ERSA 2003»
15 years 8 months ago
A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA
The availability of SiGe HBT devices has opened a door for Gigahertz FPGAs. However, the large device power consumption limits its scale. In order to solve this problem, a Multipl...
Jong-Ru Guo, Chao You, Michael Chu, Kuan Zhou, You...
ODRL
2004
15 years 8 months ago
A Pervasive Application Rights Management Architecture (PARMA) based on ODRL
Software license management is currently expanding from its traditional desktop environment into the mobile application space, but software vendors are still applying old licensing...
Dominik Dahlem, Ivana Dusparic, Jim Dowling
ISCAPDCS
2003
15 years 8 months ago
Dynamic Simultaneous Multithreaded Architecture
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
Daniel Ortiz Arroyo, Ben Lee
WSC
2001
15 years 8 months ago
T.LoaDS abbreviated systems architecture
The Tactical Logistics Distribution System (T.LoaDS or TLoaDS) is a powerful and flexible simulation application for assessing current or future tactical or sea-based distribution...
Bob Hamber
CPHYSICS
2010
135views more  CPHYSICS 2010»
15 years 7 months ago
An events based algorithm for distributing concurrent tasks on multi-core architectures
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
David W. Holmes, John R. Williams, Peter Tilke