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ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
16 years 1 days ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
195
Voted
ICDCS
2002
IEEE
15 years 11 months ago
An Extensible and Scalable Content Adaptation Pipeline Architecture to Support Heterogeneous Clients
The importance of middleware and content adaptation has previously been demonstrated for pervasive use of Web-based applications. In this paper we propose a modular, extensible, a...
Thomas Phan, George Zorpas, Rajive Bagrodia
MICRO
2002
IEEE
109views Hardware» more  MICRO 2002»
15 years 11 months ago
Using modern graphics architectures for general-purpose computing: a framework and analysis
Recently, graphics hardware architectures have begun to emphasize versatility, offering rich new ways to programmatically reconfigure the graphics pipeline. In this paper, we exp...
Chris J. Thompson, Sahngyun Hahn, Mark Oskin
DAC
1996
ACM
15 years 11 months ago
Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures
In this paper we address the problem of code generation for basic blocks in heterogeneous memory-register DSP processors. We propose a new a technique, based on register-transfer ...
Guido Araujo, Sharad Malik, Mike Tien-Chien Lee
SSD
1993
Springer
112views Database» more  SSD 1993»
15 years 11 months ago
A Storage and Access Architecture for Efficient Query Processing in Spatial Database Systems
: Due to the high complexity of objects and queries and also due to extremely large data volumes, geographic database systems impose stringent requirements on their storage and acc...
Thomas Brinkhoff, Holger Horn, Hans-Peter Kriegel,...