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ISSS
2002
IEEE
126views Hardware» more  ISSS 2002»
15 years 11 months ago
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali...
CAISE
2009
Springer
15 years 11 months ago
Goal-Directed Modeling of Self-adaptive Software Architecture
Abstract. Today’s large-scale computing systems are deployed in open, changing and unpredictable environments. To operate reliably, such systems should be able to adapt to new ci...
Shan Tang, Xin Peng, Yijun Yu, Wenyun Zhao
WECWIS
2000
IEEE
155views ECommerce» more  WECWIS 2000»
15 years 11 months ago
Distributed and Scalable XML Document Processing Architecture for E-Commerce Systems
XML has become a very important emerging standard for E-commerce because of its flexibility and universality. Many software designers are actively developing new systems to handle...
David Wai-Lok Cheung, Sau Dan Lee, Thomas Lee, Wil...
FPGA
1999
ACM
130views FPGA» more  FPGA 1999»
15 years 11 months ago
Hybrid Product Term and LUT Based Architectures Using Embedded Memory Blocks
The Embedded System Block (ESB) of the APEX20K programmable logic device family from Altera Corporation includes the capability of implementing product term macrocells in addition...
Frank Heile, Andrew Leaver
MICRO
1994
IEEE
81views Hardware» more  MICRO 1994»
15 years 10 months ago
Register file port requirements of transport triggered architectures
Exploitation of large amounts of instruction level parallelism requires a large amount of connectivity between the shared register file and the function units; this connectivity i...
Jan Hoogerbrugge, Henk Corporaal