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ICCD
2003
IEEE
113views Hardware» more  ICCD 2003»
16 years 1 hour ago
Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity
As the technology is shrinking toward 50 nm and the working frequency is going into multi gigahertz range, the effect of interconnects on functionality and performance of system-o...
Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nour...
DATE
2002
IEEE
118views Hardware» more  DATE 2002»
15 years 11 months ago
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. ...
Marcos Sanchez-Elez, Milagros Fernández, Ra...
NOMS
2002
IEEE
122views Communications» more  NOMS 2002»
15 years 11 months ago
An embedded Web server architecture for XML-based network management
Embedded Web servers are widely used today for IP-based element management. In this paper, we present a new management architecture that combines this technology with XML, DOM, an...
Hong-Taek Ju, Mi-Jung Choi, Sehee Han, Yunjung Oh,...
PCM
2009
Springer
98views Multimedia» more  PCM 2009»
15 years 11 months ago
Secure Domain Architecture for Interoperable Content Distribution
Authorized domains are used to share digital content among multiple devices without violating the copyright issues. However, if a domain is composed of multiple devices supporting ...
Lei Lei Win, Tony Thomas, Sabu Emmanuel, Mohan S. ...
155
Voted
EURODAC
1994
IEEE
116views VHDL» more  EURODAC 1994»
15 years 10 months ago
A performance evaluator for parameterized ASIC architectures
System-levelpartitioning assigns functionalobjects such as tasks or code segments to system-level components such as o-the-shelf processors or application-speci c architectures in...
Jie Gong, Daniel D. Gajski, Alex Nicolau