— A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost and flexible routing capability. To achieve a low area cost, th...
— Considerable research efforts in the networking community are focused on defining a new Internet architecture that not only solves some of the problems of the current design, ...
Stochastic decoding is a new alternative method for low complexity decoding of error-correcting codes. This paper presents the first hardware architecture for stochastic decoding...
Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gros...
Abstract. We present Sancta, a flexible control architecture for multirobot teams. It is fully written in Ada 2005, except for the reuse of some C libraries. In this paper we high...
This work proposes a new architecture and execution model called 2D-VLIW. This architecture adopts an execution model based on large pieces of computation running over a matrix of...