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ASPLOS
2006
ACM
16 years 22 days ago
A spatial path scheduling algorithm for EDGE architectures
Growing on-chip wire delays are motivating architectural features that expose on-chip communication to the compiler. EDGE architectures are one example of communication-exposed mi...
Katherine E. Coons, Xia Chen, Doug Burger, Kathryn...
CASES
2006
ACM
16 years 22 days ago
Automatic performance model construction for the fast software exploration of new hardware designs
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when there is only a simulator of the machine available. Designing such a compiler requ...
John Cavazos, Christophe Dubach, Felix V. Agakov, ...
CF
2006
ACM
16 years 22 days ago
Exploiting locality to ameliorate packet queue contention and serialization
Packet processing systems maintain high throughput despite relatively high memory latencies by exploiting the coarse-grained parallelism available between packets. In particular, ...
Sailesh Kumar, John Maschmeyer, Patrick Crowley
COMPGEOM
2006
ACM
16 years 21 days ago
Minimum-cost coverage of point sets by disks
We consider a class of geometric facility location problems in which the goal is to determine a set X of disks given by their centers (tj) and radii (rj) that cover a given set of...
Helmut Alt, Esther M. Arkin, Hervé Brö...
179
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COMPGEOM
2006
ACM
16 years 21 days ago
Plane embeddings of planar graph metrics
Embedding metrics into constant-dimensional geometric spaces, such as the Euclidean plane, is relatively poorly understood. Motivated by applications in visualization, ad-hoc netw...
MohammadHossein Bateni, Mohammad Taghi Hajiaghayi,...
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