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IEEEPACT
2000
IEEE
15 years 11 months ago
Instruction Scheduling for Clustered VLIW DSPs
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...
Rainer Leupers
CARDIS
2006
Springer
114views Hardware» more  CARDIS 2006»
15 years 10 months ago
A Low-Footprint Java-to-Native Compilation Scheme Using Formal Methods
Ahead-of-Time and Just-in-Time compilation are common ways to improve runtime performances of restrained systems like Java Card by turning critical Java methods into native code. H...
Alexandre Courbot, Mariela Pavlova, Gilles Grimaud...
CORR
2011
Springer
168views Education» more  CORR 2011»
15 years 1 months ago
Precoding for Outage Probability Minimization on Block Fading Channels
The outage probability limit is a fundamental and achievable lower bound on the word error rate of coded communication systems affected by fading. This limit is mainly determined ...
Dieter Duyck, Joseph Jean Boutros, Marc Moeneclaey
EUROSYS
2010
ACM
16 years 3 months ago
Reverse Engineering of Binary Device Drivers with RevNIC
This paper presents a technique that helps automate the reverse engineering of device drivers. It takes a closed-source binary driver, automatically reverse engineers the driver...
Vitaly Chipounov, George Candea
PLDI
2004
ACM
15 years 12 months ago
Vectorization for SIMD architectures with alignment constraints
When vectorizing for SIMD architectures that are commonly employed by today’s multimedia extensions, one of the new challenges that arise is the handling of memory alignment. Pr...
Alexandre E. Eichenberger, Peng Wu, Kevin O'Brien