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DATE
2006
IEEE
113views Hardware» more  DATE 2006»
16 years 15 days ago
An interprocedural code optimization technique for network processors using hardware multi-threading support
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
Hanno Scharwächter, Manuel Hohenauer, Rainer ...
SC
2005
ACM
16 years 2 hour ago
Transformations to Parallel Codes for Communication-Computation Overlap
This paper presents program transformations directed toward improving communication-computation overlap in parallel programs that use MPI’s collective operations. Our transforma...
Anthony Danalis, Ki-Yong Kim, Lori L. Pollock, D. ...
SOFTVIS
2005
ACM
16 years 36 min ago
CVSscan: visualization of code evolution
During the life cycle of a software system, the source code is changed many times. We study how developers can be enabled to get insight in these changes, in order to understand t...
Lucian Voinea, Alexandru Telea, Jarke J. van Wijk
PARA
2004
Springer
15 years 11 months ago
Cache Optimizations for Iterative Numerical Codes Aware of Hardware Prefetching
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
Josef Weidendorfer, Carsten Trinitis
RE
2009
Springer
15 years 11 months ago
Use Case to Source Code Traceability: The Developer Navigation View Point
Requirements traceability is a challenge for modern software projects where task dependencies and technical experspread across system developers, abstract model representations su...
Inah Omoronyia, Guttorm Sindre, Marc Roper, John D...