With the increasing complexity of the emerging embedded real-time systems, traditional design approaches can not provide sufficient support for the development of these systems an...
Jinfeng Huang, Jeroen Voeten, Andre Ventevogel, Le...
With System on Chip low power constraints becoming increasingly important, emphasis is moving to architectural level, optimum memory organisation and system run time management. T...
This contribution proposes a synchronization technique for solvers able to handle analogue extensions to SystemC, for modelling of general, mixed-mode systems with digital and non...
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...