Sciweavers

2887 search results - page 292 / 578
» Name Generation and Linearity
Sort
View
FPL
2009
Springer
161views Hardware» more  FPL 2009»
15 years 11 months ago
A multi-FPGA architecture for stochastic Restricted Boltzmann Machines
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
Daniel L. Ly, Paul Chow
SIGGRAPH
1993
ACM
15 years 10 months ago
Frequency domain volume rendering
The Fourier projection-slice theorem allows projections of volume data to be generated in O(n2 log n) time for a volume of size n3 . The method operates by extracting and inverse ...
Takashi Totsuka, Marc Levoy
ISAAC
1992
Springer
132views Algorithms» more  ISAAC 1992»
15 years 10 months ago
Generalized Assignment Problems
In the multilevel generalized assignment problem (MGAP) agents can perform tasks at more than one efficiency level. Important manufacturing problems, such as lot sizing, can be ea...
Silvano Martello, Paolo Toth
CC
2006
Springer
101views System Software» more  CC 2006»
15 years 10 months ago
SARA: Combining Stack Allocation and Register Allocation
Commonly-used memory units enable a processor to load and store multiple registers in one instruction. We showed in 2003 how to extend gcc with a stack-location-allocation (SLA) ph...
V. Krishna Nandivada, Jens Palsberg
ITC
2000
IEEE
84views Hardware» more  ITC 2000»
15 years 10 months ago
Non-intrusive BIST for systems-on-a-chip
1 The term "functional BIST" describes a test method to control functional modules so that they generate a deterministic test set, which targets structural faults within ...
Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wund...