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ITC
1994
IEEE
151views Hardware» more  ITC 1994»
15 years 10 months ago
Automated Logic Synthesis of Random-Pattern-Testable Circuits
Previous approaches to designing random pattern testable circuits use post-synthesis test point insertion to eliminate random pattern resistant (r.p.r.) faults. The approach taken...
Nur A. Touba, Edward J. McCluskey
ATC
2009
Springer
15 years 10 months ago
SAConf: Semantic Attestation of Software Configurations
Remote attestation is one of the key functionalities provided by trusted platforms. Most current attestation approaches are based on cryptographic hash functions, which are appropr...
Hua Wang, Yao Guo, Xiangqun Chen
CLUSTER
2007
IEEE
15 years 10 months ago
A feasibility analysis of power-awareness and energy minimization in modern interconnects for high-performance computing
High-performance computing (HPC) systems consume a significant amount of power, resulting in high operational costs, reduced reliability, and wasting of natural resources. Therefor...
Reza Zamani, Ahmad Afsahi, Ying Qian, V. Carl Hama...
ECCV
2010
Springer
15 years 10 months ago
Detection and Tracking of Large Number of Targets in Wide Area Surveillance
In this paper, we tackle the problem of object detection and tracking in a new and challenging domain of wide area surveillance. This problem poses several challenges: large camera...
ICCAD
2007
IEEE
151views Hardware» more  ICCAD 2007»
15 years 10 months ago
A design flow dedicated to multi-mode architectures for DSP applications
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
Cyrille Chavet, Caaliph Andriamisaina, Philippe Co...