Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
We propose an analytical model to assess the throughput and connection blocking rate of Opportunistic Spectrum Orthogonal Frequency Division Multiple Access network constituted of ...
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
Abstract. We present the Operator Language (OL), a framework to automatically generate fast numerical kernels. OL provides the structure to extend the program generation system Spi...
Information goods vendors offer different pricing schemes such as per user pricing and site licensing. Why do competing sellers adopt different pricing schemes for the same inform...