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134
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ICCD
2005
IEEE
16 years 3 months ago
2005
IEEE
Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3...
164
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ICCD
2002
IEEE
16 years 3 months ago
2002
IEEE
A variety of factors is making it increasingly difficult and expensive to design and manufacture traditional Application Specific Integrated Circuits (ASICs). This has started a s...
156
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ICCAD
2007
IEEE
16 years 3 months ago
2007
IEEE
— In this paper, we present the first work on the Steiner routing for 3D stacked ICs. In the 3D Steiner routing problem, the pins are located in multiple device layers, which ma...
163
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ICCAD
2005
IEEE
16 years 3 months ago
2005
IEEE
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
152
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ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
Current CMOS technologies are characterized by interconnect lines with increased relative resistance w.r.t. driver output resistance. Designs generate signal waveshapes that are v...