The memory consistency model supported by a multiprocessor architecture determines the amount of buffering and pipelining that may be used to hide or reduce the latency of memory ...
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...
This paper is concerned with the performance evaluation of fingerprint verification systems. After an initial classification of biometric testing initiatives, we explore both the t...
Networked games can provide groupware developers with important lessons in how to deal with real-world networking issues such as latency, limited bandwidth and packet loss. Games ...
Jeff Dyck, Carl Gutwin, T. C. Nicholas Graham, Dav...
Real-time transmission over asymmetric satellite IP links is challenging, since satellite systems commonly exhibit long propagation delays, while bandwidth asymmetry often enforce...
This paper presents a parallelization framework for emerging applications on the future chip multiprocessors (CMPs). With the continuing prevalence of CMP and the number of on-die...