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ISQED
2006
IEEE
106views Hardware» more  ISQED 2006»
16 years 18 days ago
Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration
We propose an accurate architecture-level power estimation method for SRAM memories. This hybrid method is composed of an analytical part for dynamic power estimation and a circui...
Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-...
DSSCV
2005
Springer
16 years 3 days ago
Deep Structure of Images in Populations Via Geometric Models in Populations
We face the question of how to produce a scale space of image intensities relative to a scale space of objects or other characteristic image regions filling up the image space, whe...
Stephen M. Pizer, Ja-Yeon Jeong, Robert E. Broadhu...
ICANN
2005
Springer
16 years 2 days ago
A Model for Hierarchical Associative Memories via Dynamically Coupled GBSB Neural Networks
Many approaches have emerged in the attempt to explain the memory process. One of which is the Theory of Neuronal Group Selection (TNGS), proposed by Edelman [1]. In the present wo...
Rogério M. Gomes, Antônio de Pá...
KR
2004
Springer
15 years 12 months ago
Inferential Complexity Control for Model-Based Abduction
We describe a technique for speeding up inference for model-based abduction tasks that trades off inference time and/or space for the fraction of queries correctly answered. We co...
Gregory M. Provan
SAMOS
2004
Springer
15 years 12 months ago
Modeling Loop Unrolling: Approaches and Open Issues
Abstract. Loop unrolling plays an important role in compilation for Reconfigurable Processing Units (RPUs) as it exposes operator parallelism and enables other transformations (e.g...
João M. P. Cardoso, Pedro C. Diniz