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DAC
2002
ACM
16 years 7 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
170
Voted
DAC
2002
ACM
16 years 7 months ago
The next chip challenge: effective methods for viable mixed technology SoCs
The next generation of computer chips will continue the trend for more complexity than their predecessors. Many of them will contain different chip technologies and are termed SoC...
H. Bernhard Pogge
DAC
2004
ACM
16 years 7 months ago
Heterogeneous MP-SoC: the solution to energy-efficient signal processing
To meet conflicting flexibility, performance and cost constraints of demanding signal processing applications, future designs in this domain will contain an increasing number of a...
Tim Kogel, Heinrich Meyr
168
Voted
WWW
2009
ACM
16 years 7 months ago
Automatically assessing resource quality for educational digital libraries
With the rise of community-generated web content, the need for automatic assessment of resource quality has grown, particularly in the realm of educational digital libraries. We d...
Philipp G. Wetzler, Steven Bethard, Kirsten R. But...
MOBIHOC
2009
ACM
16 years 7 months ago
Characterizing the exit process of a non-saturated IEEE 802.11 wireless network
In this paper, we consider a non-saturated IEEE 802.11 based wireless network. We use a three-way fixed point to model the node behavior with Bernoulli packet arrivals and determi...
Punit Rathod, Onkar Dabeer, Abhay Karandikar, Anir...