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ICCAD
2003
IEEE
129views Hardware» more  ICCAD 2003»
15 years 12 months ago
Performance Optimization of Latency Insensitive Systems Through Buffer Queue Sizing of Communication Channels
This paper proposes for latency insensitive systems a performance optimization technique called channel buffer queue sizing, which is performed after relay station insertion in th...
Ruibing Lu, Cheng-Kok Koh
DSN
2002
IEEE
15 years 11 months ago
Performability Analysis of Guarded-Operation Duration: A Successive Model-Translation Approach
When making an engineering design decision, it is often necessary to consider its implications on both system performance and dependability. In this paper, we present a performabi...
Ann T. Tai, William H. Sanders, Leon Alkalai, Savi...
ICPP
2002
IEEE
15 years 11 months ago
Analysis of Memory Hierarchy Performance of Block Data Layout
Recently, several experimental studies have been conducted on block data layout as a data transformation technique used in conjunction with tiling to improve cache performance. In...
Neungsoo Park, Bo Hong, Viktor K. Prasanna
INFOCOM
2000
IEEE
15 years 11 months ago
Performance Comparison of Two On-demand Routing Protocols for Ad Hoc Networks
Ad hoc networks are characterized by multihop wireless connectivity, frequently changing network topology and the need for efficient dynamic routing protocols. We compare the perf...
Samir Ranjan Das, Charles E. Perkins, Elizabeth M....
ICPADS
2010
IEEE
15 years 4 months ago
Effective Performance Measurement at Petascale Using IPM
As supercomputers are being built from an ever increasing number of processing elements, the effort required to achieve a substantial fraction of the system peak performance is con...
Karl Fürlinger, Nicholas J. Wright, David Ski...