Sciweavers

9818 search results - page 1791 / 1964
» Much Support and More
Sort
View
DAC
2004
ACM
16 years 7 months ago
ORACLE: optimization with recourse of analog circuits including layout extraction
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
Yang Xu, Lawrence T. Pileggi, Stephen P. Boyd
ICSE
2008
IEEE-ACM
16 years 7 months ago
Symbolic mining of temporal specifications
Program specifications are important in many phases of the software development process, but they are often omitted or incomplete. An important class of specifications takes the f...
Mark Gabel, Zhendong Su
SIGSOFT
2007
ACM
16 years 7 months ago
Model checking service compositions under resource constraints
When enacting a web service orchestration defined using the Business Process Execution Language (BPEL) we observed various safety property violations. This surprised us considerab...
David S. Rosenblum, Howard Foster, Jeff Kramer, Je...
SIGSOFT
2007
ACM
16 years 7 months ago
Quantitative verification: models techniques and tools
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
Marta Z. Kwiatkowska
SIGSOFT
2005
ACM
16 years 7 months ago
ASTEC: a new approach to refactoring C
The C language is among the most widely used in the world, particularly for critical infrastructure software. C programs depend upon macros processed using the C preprocessor, but...
Bill McCloskey, Eric A. Brewer
« Prev « First page 1791 / 1964 Last » Next »