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ICCD
2004
IEEE
125views Hardware» more  ICCD 2004»
16 years 3 months ago
IPC Driven Dynamic Associative Cache Architecture for Low Energy
Existing schemes for cache energy optimization incorporate a limited degree of dynamic associativity: either direct mapped or full available associativity (say 4-way). In this pap...
Sriram Nadathur, Akhilesh Tyagi
ICCD
2001
IEEE
213views Hardware» more  ICCD 2001»
16 years 3 months ago
Analysis and Reduction of Capacitive Coupling Noise in High-Speed VLSI Circuits
Abstract-- Scaling the minimum feature size of VLSI circuits to sub-quarter micron and its clock frequency to 2GHz has caused crosstalk noise to become a serious problem, that degr...
Payam Heydari, Massoud Pedram
ICCAD
2007
IEEE
143views Hardware» more  ICCAD 2007»
16 years 3 months ago
TIP-OPC: a new topological invariant paradigm for pixel based optical proximity correction
—As the 193nm lithography is likely to be used for 45nm and even 32nm processes, much more stringent requirement will be posed on Optical Proximity Correction (OPC) technologies....
Peng Yu, David Z. Pan
ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
16 years 3 months ago
The Y-Architecture for On-Chip Interconnect: Analysis and Methodology
The Y-architecture for on-chip interconnect is based on pervasive use of 0-, 120-, and 240-degree oriented semi-global and global wiring. Its use of three uniform directions explo...
Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Io...
ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
16 years 3 months ago
Fredkin/Toffoli Templates for Reversible Logic Synthesis
Reversible logic has applications in quantum computing, low power CMOS, nanotechnology, optical computing, and DNA computing. The most common reversible gates are the Toffoli gate...
Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller