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IPPS
2007
IEEE
16 years 24 days ago
Exploring a Multithreaded Methodology to Implement a Network Communication Protocol on the Cyclops-64 Multithreaded Architecture
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
Ge Gan, Ziang Hu, Juan del Cuvillo, Guang R. Gao
RTSS
2005
IEEE
16 years 2 days ago
Energy-Aware Modeling and Scheduling of Real-Time Tasks for Dynamic Voltage Scaling
Abstract— Dynamic voltage scaling (DVS) is a promising technique for battery-powered systems to conserve energy consumption. Most existing DVS algorithms assume information about...
Xiliang Zhong, Cheng-Zhong Xu
SBCCI
2004
ACM
111views VLSI» more  SBCCI 2004»
15 years 12 months ago
A partial reconfigurable architecture for controllers based on Petri nets
Digital Control System in the industry has been used in most of the applications based on expensive Programmable Logical Controllers (PLC). These Systems are, in general, highly c...
Paulo Sérgio B. do Nascimento, Paulo Romero...
WMPI
2004
ACM
15 years 12 months ago
Evaluating kilo-instruction multiprocessors
The ever increasing gap in processor and memory speeds has a very negative impact on performance. One possible solution to overcome this problem is the Kilo-instruction processor. ...
Marco Galluzzi, Ramón Beivide, Valentin Pue...
ISWC
2003
IEEE
15 years 11 months ago
An Extended Menu Navigation Interface Using Multiple Pressure-Sensitive Strips
We present extensions and modifications that we have made to a cursorless menu navigation interface that is controlled by multiple pressure-sensitive linear strips. Our approach i...
Gábor Blaskó, Steven Feiner