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EXPCS
2007
15 years 10 months ago
RiceNIC: a reconfigurable network interface for experimental research and education
The evaluation of new network server architectures is usually performed experimentally using either a simulator or a hardware prototype. Accurate simulation of the hardwaresoftwar...
Jeffrey Shafer, Scott Rixner
ANSS
2004
IEEE
15 years 10 months ago
Cache Simulation Based on Runtime Instrumentation for OpenMP Applications
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
Jie Tao, Josef Weidendorfer
ASAP
2004
IEEE
141views Hardware» more  ASAP 2004»
15 years 10 months ago
Evaluating Instruction Set Extensions for Fast Arithmetic on Binary Finite Fields
Binary finite fields GF(2n ) are very commonly used in cryptography, particularly in publickey algorithms such as Elliptic Curve Cryptography (ECC). On word-oriented programmable ...
A. Murat Fiskiran, Ruby B. Lee
ARC
2006
Springer
157views Hardware» more  ARC 2006»
15 years 10 months ago
PISC: Polymorphic Instruction Set Computers
We introduce a new paradigm in the computer architecture referred to as Polymorphic Instruction Set Computers (PISC). This new paradigm, in difference to RISC/CISC, introduces hard...
Stamatis Vassiliadis, Georgi Kuzmanov, Stephan Won...
SRDS
1998
IEEE
15 years 10 months ago
A Metaobject Protocol for Fault-Tolerant CORBA Applications
Abstract: The use of meta-level architectures for the implementation of faulttolerant systems is today very appealing. Nevertheless, all existing fault-tolerant systems based on th...
Marc-Olivier Killijian, Jean-Charles Fabre, Juan-C...