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ERSA
2006
186views Hardware» more  ERSA 2006»
15 years 8 months ago
The Case for High Level Programming Models for Reconfigurable Computers
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...
David L. Andrews, Ron Sass, Erik Anderson, Jason A...
TKDE
2002
239views more  TKDE 2002»
15 years 6 months ago
An Efficient Path Computation Model for Hierarchically Structured Topographical Road Maps
In this paper, we have developed a HiTi (Hierarchical MulTi) graph model for structuring large topographical road maps to the minimum cost route computation. The HiTi graph model p...
Sungwon Jung, Sakti Pramanik
SC
2005
ACM
16 years 10 days ago
A Power-Aware Run-Time System for High-Performance Computing
For decades, the high-performance computing (HPC) community has focused on performance, where performance is defined as speed. To achieve better performance per compute node, mic...
Chung-Hsing Hsu, Wu-chun Feng
ICRA
2000
IEEE
180views Robotics» more  ICRA 2000»
15 years 11 months ago
Interactive Motion Planning Using Hardware-Accelerated Computation of Generalized Voronoi Diagrams
We present techniques for fast motion planning by using discrete approximations of generalized Voronoi diagrams, computed with graphics hardware. Approaches based on this diagram ...
Kenneth E. Hoff III, Tim Culver, John Keyser, Ming...
FCT
1991
Springer
15 years 10 months ago
The Complexity of Computing Maximal Word Functions
Maximal word functions occur in data retrieval applications and have connections with ranking problems, which in turn were rst investigated in relation to data compression 21 . By ...
Danilo Bruschi, Giovanni Pighizzini