A parallel version of the plane sweep algorithm targeted towards the small number of processing cores available on commonly available multi-core systems is presented. Experimental...
We propose an algorithm for assessing probabilistic performance constraints for systems including components with uncertain delays. We make a case for designing systems based on a...
Gustavo de Veciana, Margarida F. Jacome, J.-H. Guo
A 550MHz 64b PowerPC processor was developed for fabrication in Silicon-On-Insulator (SOI) technology from a processor previously designed and fabricated in bulk CMOS [1]. Both th...
Many embedded systems are implemented with a set of alternative function variants to adapt the system to different applications or environments. This paper proposes a novel approa...
This paper describes a strategy for verifying data-hazard correctness of out-of-order processors that implement register-renaming. We define a set of predicates to characterize re...